FPGA IP Core Development

FPGA IP Core Development

Our experts bear extensive experience in FPGA Hardware and Software designing to provide complete solutions to industries of diverse verticals. Our product engineering team with sound expertise use time-tested methods to provide the best FPGA IP Core development service as per the clients’ requirements.TeReSol has designed Video Compression core for H.264 on XILINIX based FPGAs SPARTAN 3400 DSP and 6.

Details

OVERVIEW

Implementation of Military Standard (MIL-STD) Avionics Communication Protocols and Bridges using FPGAs.
Design and implementation of Video Codecs on FPGAs for transmission and storage purposes.
Conversion algorithms for different Video Standards (HDMI, VGA, Composite (PAL/NTSC) for display on contemporary and legacy display systems.
Development of Flight-critical electronic flight control avionics applications.
Rapid prototyping and faster time-to-market for a wide range of video and imaging applications, waveform generation, serial/parallel backplane communication and industrial automation.

CAPABILITIES

Implementation of H.264 Video Codec (Baseline Profile) on Xilinx Spartan 3A DSP FPGA
Design and implementation of a PCI-VME64 Communication Protocol Bridge on Xilinx Spartan 6 FPGA
Design and implementation of a PCIe-VME32 Communication Protocol Bridge on Xilinx Spartan 6 FPGA
Designed and implemented a VGA to STANAG-3350B video encoder on a XILINX Spartan-6 FPGA interfaced with an NVIDIA Tegra K1 processor
Developed an algorithm for generation of Alphanumeric symbols and Reticles (Stroke) and the display of Raster video on the Head-Up Display (HuD) of an aircraft
Developed an algorithm for overlay display of aircraft parameters on ITU-R BT.656 encoded video
Implementation of widely used serial protocols (SPI, i2C, i2S and UART) for configuration and interfacing between Codec ICs and FPGAs.